Project #4: Two Digit Hex Counter

This project builds a two digit hex counter that can count up and down. Further, the count can reset at any time and held on the rising edge of any clock. I synthesized it with the Synopsys compiler after the XST fiasco in project 3, however ran into another interesting bit. 

The XST compiler allows you to map a port pin to a constant, as in:

ux: hex_display port map (blank => '0', test => '0', ...);

This is quite handy if you aren't going to be using those pins, further the place and route code usually can optimize out the logic that would have been driven by these pins. 

But the fancy (and expensive) Synopsys compiler won't accept that, nope. Instead you have to write:

signal bogus_signal : std_logic;
bogus_signal <= '0'; -- always zero this one
ux: hex_display port map (blank=> bogus_signal, test => bogus_signal,...);

Where is the advantage in that? Ashenden indicates that strict VHDL syntax would not allow what the XST guys allow, but heck it is effectively the same thing? Why not support this small bit of syntactic sugar? The bottom line here is:

VHDL compilers are all different, in spite of the hype it is just as impossible to write portable VHDL code as it is C code.

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Copyright 2001 Chuck McManis, All Rights Reserved.