Project #2 : LED Display Gizmo (looper)


Ok, so I've got my 10hz oscillator chip running, now what ? Well we're designing chips right? So the next step seems to be how can I use the chip I just designed in a new project and that became the next step on the path to VHDL enlightenment.

The LED Looper project  uses a 7 segment display (8 LEDs total if you count the decimal point). The goal of the project was to re-use the clock generator I built in project #1 in a new project. 

The VHDL construct that includes other VHDL is the 'component' statement. I think of this statement to be loosely analogous to the C prototype statement. It says I know there is a component named foo that has the following pins. Then later you can hook up an instance of foo and connect it to your internal signals. 

An alternative way of doing this is to generate a schematic symbol for each of your VHDL "sub" parts, then wire them together in the schematic. That is visually pretty appealing and perhaps a good compromise for small circuits.

One interesting thing in the WebPACK tools is that when you save the VHDL file that has both the component statement and the instantiation of that component in the same file, the tool re-organizes the list box to make the component a "child" of the main design. That is cute but beware when you go to synthesize something, if you don't have the master component selected it won't get synthesized! Only the highlighted (aka selected) component gets synthesized and its children (or dependent) components! Not realizing this lead to some interesting non-circuits.

One of the neat VHDL things I learned from this project was how the & operator works on type STD_LOGIC_VECTOR. Instead of treating it like the logical function AND, this operator is the concatenation operation. Thus the expression '1' & "000" becomes "1000" not "0" as some C programmers might guess.

Previous Project

Back To FPGA Journey

Next Project


Copyright 2001 Chuck McManis, All Rights Reserved.